thirschbuechler

unfortunately, there are no eagle files, since it was designed in NI AWR which is a RF design and simulation tool. The Circuit Diagram is shown in Step#2, after "C_out" the filter is appended. Which component placements do you need help with

by clicking the link below his username you can find the test program on his site: http://bytechlab.pl/artykul-2

2) If your 100MHz clock-signal is sinusoidial and relatively strong, your average passive probe probably will do fine. However, if you've got a non-sinusoidial (and/or weak signal), e.g. rectangular, your scope may show a worse representation due to relatively lowpass behaviour of the passive probe, meaning some of the harmonic components needed to form the signal may be cut off, as well as the measurement influencing the (weak) signal (by weakening it further).5) Probably ~400-500MHz limitation with FR4: The problem with FR4 is its relatively "Epsilon_r" (dielectric constant), so my guess is you may be able to work with that, but have to deal with more variation from board to board, as well as locally if you're unlucky, presumably especially at the output filter. Nevertheless...

2) If your 100MHz clock-signal is sinusoidial and relatively strong, your average passive probe probably will do fine. However, if you've got a non-sinusoidial (and/or weak signal), e.g. rectangular, your scope may show a worse representation due to relatively lowpass behaviour of the passive probe, meaning some of the harmonic components needed to form the signal may be cut off, as well as the measurement influencing the (weak) signal (by weakening it further).5) Probably ~400-500MHz limitation with FR4: The problem with FR4 is its relatively "Epsilon_r" (dielectric constant), so my guess is you may be able to work with that, but have to deal with more variation from board to board, as well as locally if you're unlucky, presumably especially at the output filter. Nevertheless, I'd like to see a FR4 implementation turns out!(Why the BF998?): That's in the thesis, page 4-7 ;)(x20 gain): there is no x20 voltage "gain", please see my reply to (3.3: 1/20 ampl. = x20 attenuation), but ID=30mA is correct. The reason that VG1, the bias voltage (on the RF_in) is 2.4V (figure 3.16: thesis page 25) is that negative parts of the input signal can't pull it out of the linear area and towards the left in bf998's diagram6, so to speak.4)(input rating): no, please see the last graphs of the instructable and calculate dBm to V via the provided linked table. The bias-voltage is probably the first limit, so you had to drive the mosfet with an unsafe high bias (uncertain life expectancy) to get a higher Vpp_in,max. In that respect the Vpp_in,max=2V, as given on the last page of the instructable, seems quite reasonable. Also refer to the THD figures (e.g. page 30).

Thanksfor asking! I can tell you straight away (Pages refer to the thesis):1)TheTermination can be omitted in principle if the cable-length L issmaller than the wavelength/2 (c=lambda * f, c=2/3 * speed-of-light(because of coaxcable)), since no standing waves can form (due toboundary conditions) and wavepropagation can be neglected. (i.e. 1ftcable = 0,3m → max. ~250MHz).3.1)No, the working point gets applied via R_bias, the second gate ismerely short-circuited for gain stabilisation. The 9V at the drain isthe supply, not the bias. I changed the setup-schematic to reflectthat ("ext. DC" referred to the thesis' experimental bias,oops..)3.2)see Page 7: "This [additional bias voltage] is required as theFet needs to work in the positive input voltage range, and withoutthe...

Thanksfor asking! I can tell you straight away (Pages refer to the thesis):1)TheTermination can be omitted in principle if the cable-length L issmaller than the wavelength/2 (c=lambda * f, c=2/3 * speed-of-light(because of coaxcable)), since no standing waves can form (due toboundary conditions) and wavepropagation can be neglected. (i.e. 1ftcable = 0,3m → max. ~250MHz).3.1)No, the working point gets applied via R_bias, the second gate ismerely short-circuited for gain stabilisation. The 9V at the drain isthe supply, not the bias. I changed the setup-schematic to reflectthat ("ext. DC" referred to the thesis' experimental bias,oops..)3.2)see Page 7: "This [additional bias voltage] is required as theFet needs to work in the positive input voltage range, and withoutthe DC-offset it would handle negative voltage transitionssignificantly worse." (Any transistor rated for AC has to have abias-voltage, as it can only open and close like a valve so to speak,but not provide negative voltage directly. So you need to superimposesome DC, let the transistor do its thing, then chop off the DC again)3.3)R1 was chosen by playing around with adjacent values of 47Ohm to getto 1/20 signal „amplification“ (→x20 probe). You can estimatethe gain via formula 2.1 of page 7 (having calculated "S"after a measurement with R1=47Ohm), but that's only an idealization;)